{"title":"PIN二极管建模仿真和开发高功率限幅器、数字控制移相器和高隔离SPDT开关","authors":"M. Nazir, M. Kashif, N. Ahsan, Z. Y. Malik","doi":"10.1109/IBCAST.2013.6512197","DOIUrl":null,"url":null,"abstract":"This paper presents design and development of PIN diode based RF circuit blocks for radar applications. These RF blocks include a high power limiter, 5-bit digital phase shifter and a high isolation SPDT switch. PIN diode modelling technique along with design challenges and implementation schemes for these RF blocks have been discussed. For limiter, a loss reduction technique has been discussed that can reduce the noise figure of the receiver. For the intended application, the signal is limited from 1kW (60dBm) to 10 mW(10 dBm). Design philosophy and tradeoffs of a five bit digital phase shifter have been discussed in detail. The intended phase increments are 11.25, 22.5, 45, 90 and 180 degrees with tolerance of +/-1, 2, 3, 5, 7 degrees respectively. For PIN diode switch application, isolation improvement technique has also been presented. The targeted loss is 1 dB with isolation of 20 dB all over the band. Simulation and measured results of all three RF blocks are in good agreement, thus indicating the accuracy of proposed PIN diode modelling technique.","PeriodicalId":276834,"journal":{"name":"Proceedings of 2013 10th International Bhurban Conference on Applied Sciences & Technology (IBCAST)","volume":"331 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-05-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"PIN diode modelling for simulation and development of high power limiter, digitally controlled phase shifter and high isolation SPDT switch\",\"authors\":\"M. Nazir, M. Kashif, N. Ahsan, Z. Y. Malik\",\"doi\":\"10.1109/IBCAST.2013.6512197\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents design and development of PIN diode based RF circuit blocks for radar applications. These RF blocks include a high power limiter, 5-bit digital phase shifter and a high isolation SPDT switch. PIN diode modelling technique along with design challenges and implementation schemes for these RF blocks have been discussed. For limiter, a loss reduction technique has been discussed that can reduce the noise figure of the receiver. For the intended application, the signal is limited from 1kW (60dBm) to 10 mW(10 dBm). Design philosophy and tradeoffs of a five bit digital phase shifter have been discussed in detail. The intended phase increments are 11.25, 22.5, 45, 90 and 180 degrees with tolerance of +/-1, 2, 3, 5, 7 degrees respectively. For PIN diode switch application, isolation improvement technique has also been presented. The targeted loss is 1 dB with isolation of 20 dB all over the band. Simulation and measured results of all three RF blocks are in good agreement, thus indicating the accuracy of proposed PIN diode modelling technique.\",\"PeriodicalId\":276834,\"journal\":{\"name\":\"Proceedings of 2013 10th International Bhurban Conference on Applied Sciences & Technology (IBCAST)\",\"volume\":\"331 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-05-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 2013 10th International Bhurban Conference on Applied Sciences & Technology (IBCAST)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IBCAST.2013.6512197\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 2013 10th International Bhurban Conference on Applied Sciences & Technology (IBCAST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IBCAST.2013.6512197","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
PIN diode modelling for simulation and development of high power limiter, digitally controlled phase shifter and high isolation SPDT switch
This paper presents design and development of PIN diode based RF circuit blocks for radar applications. These RF blocks include a high power limiter, 5-bit digital phase shifter and a high isolation SPDT switch. PIN diode modelling technique along with design challenges and implementation schemes for these RF blocks have been discussed. For limiter, a loss reduction technique has been discussed that can reduce the noise figure of the receiver. For the intended application, the signal is limited from 1kW (60dBm) to 10 mW(10 dBm). Design philosophy and tradeoffs of a five bit digital phase shifter have been discussed in detail. The intended phase increments are 11.25, 22.5, 45, 90 and 180 degrees with tolerance of +/-1, 2, 3, 5, 7 degrees respectively. For PIN diode switch application, isolation improvement technique has also been presented. The targeted loss is 1 dB with isolation of 20 dB all over the band. Simulation and measured results of all three RF blocks are in good agreement, thus indicating the accuracy of proposed PIN diode modelling technique.