{"title":"纳米织物的安全性评价","authors":"M. Grosso, M. Rebaudengo, M. Reorda","doi":"10.1109/DFT.2007.50","DOIUrl":null,"url":null,"abstract":"Chemically assembled electronic nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing digital circuits. The paper proposes some preliminary considerations about safety of application-oriented nanoFabrics based on some results obtained through an automated platform for fault simulation. In particular, a single-fault detecting methodology is proposed and evaluated. Different fault models have been taken into account in order to evaluate alternative scenarios.","PeriodicalId":259700,"journal":{"name":"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Safety Evaluation of NanoFabrics\",\"authors\":\"M. Grosso, M. Rebaudengo, M. Reorda\",\"doi\":\"10.1109/DFT.2007.50\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Chemically assembled electronic nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing digital circuits. The paper proposes some preliminary considerations about safety of application-oriented nanoFabrics based on some results obtained through an automated platform for fault simulation. In particular, a single-fault detecting methodology is proposed and evaluated. Different fault models have been taken into account in order to evaluate alternative scenarios.\",\"PeriodicalId\":259700,\"journal\":{\"name\":\"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)\",\"volume\":\"10 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DFT.2007.50\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DFT.2007.50","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Chemically assembled electronic nanotechnology is a promising alternative to CMOS fabrication. In particular, the nanoFabric has proven to be a viable solution for implementing digital circuits. The paper proposes some preliminary considerations about safety of application-oriented nanoFabrics based on some results obtained through an automated platform for fault simulation. In particular, a single-fault detecting methodology is proposed and evaluated. Different fault models have been taken into account in order to evaluate alternative scenarios.