基于CMOS和FinFET的电压模式检测放大器的性能比较分析

Mitali Garg, Anurag, Balwinder Singh
{"title":"基于CMOS和FinFET的电压模式检测放大器的性能比较分析","authors":"Mitali Garg, Anurag, Balwinder Singh","doi":"10.1109/CICN.2016.112","DOIUrl":null,"url":null,"abstract":"FinFETs are the devices which replaced bulk MOSFETS because of its surpassing quality of minimizing leakage power and reducing short channel effects occurring in MOSFETS due to decrease in channel length. In this paper a comparative analysis of proposed Voltage Mode Sense Amplifier (VMSA) is performed using FinFET and CMOS at different technology node. Simulation is carried out using H-spice tool and it is observed that power consumption in FinFET based voltage mode sense amplifier is reduced to 85.81% at 22nm and 89.06% at 16nm technology. Power Delay Product (PDP) is reduced to 90.15% at 22nm and 90.99% at 16nm technology.","PeriodicalId":189849,"journal":{"name":"2016 8th International Conference on Computational Intelligence and Communication Networks (CICN)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A Comparative Performance Analysis of CMOS and FinFET Based Voltage Mode Sense Amplifier\",\"authors\":\"Mitali Garg, Anurag, Balwinder Singh\",\"doi\":\"10.1109/CICN.2016.112\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"FinFETs are the devices which replaced bulk MOSFETS because of its surpassing quality of minimizing leakage power and reducing short channel effects occurring in MOSFETS due to decrease in channel length. In this paper a comparative analysis of proposed Voltage Mode Sense Amplifier (VMSA) is performed using FinFET and CMOS at different technology node. Simulation is carried out using H-spice tool and it is observed that power consumption in FinFET based voltage mode sense amplifier is reduced to 85.81% at 22nm and 89.06% at 16nm technology. Power Delay Product (PDP) is reduced to 90.15% at 22nm and 90.99% at 16nm technology.\",\"PeriodicalId\":189849,\"journal\":{\"name\":\"2016 8th International Conference on Computational Intelligence and Communication Networks (CICN)\",\"volume\":\"11 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 8th International Conference on Computational Intelligence and Communication Networks (CICN)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICN.2016.112\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 8th International Conference on Computational Intelligence and Communication Networks (CICN)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICN.2016.112","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5

摘要

finfet是取代大块mosfet的器件,因为它具有最小化泄漏功率和减少mosfet中由于通道长度减少而产生的短通道效应的卓越品质。本文采用FinFET和CMOS在不同的技术节点上对所提出的电压模式检测放大器(VMSA)进行了比较分析。利用H-spice工具进行了仿真,观察到基于FinFET的电压模感测放大器在22nm和16nm工艺下的功耗分别降低到85.81%和89.06%。功率延迟产品(PDP)在22nm和16nm技术下分别降至90.15%和90.99%。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A Comparative Performance Analysis of CMOS and FinFET Based Voltage Mode Sense Amplifier
FinFETs are the devices which replaced bulk MOSFETS because of its surpassing quality of minimizing leakage power and reducing short channel effects occurring in MOSFETS due to decrease in channel length. In this paper a comparative analysis of proposed Voltage Mode Sense Amplifier (VMSA) is performed using FinFET and CMOS at different technology node. Simulation is carried out using H-spice tool and it is observed that power consumption in FinFET based voltage mode sense amplifier is reduced to 85.81% at 22nm and 89.06% at 16nm technology. Power Delay Product (PDP) is reduced to 90.15% at 22nm and 90.99% at 16nm technology.
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