{"title":"用于无线应用的8位3.5 GS/s电流转向DAC","authors":"Mohamed Taha, Khaled M. Morsi, Ahmed A. Naguib","doi":"10.1109/IMAS55807.2023.10066935","DOIUrl":null,"url":null,"abstract":"A segmented 8-bit 3.54 GS/s current-steering digital-to-analog converter (CSDAC) designed and simulated in 130 nm CMOS technology. The spurious-free dynamic range (SFDR) that represents the CSDAC linearity is ranged from 65.7 dB at 11 MHz signal frequency to 54 dB at 1.770 GHz with an effective number of bits (ENOB) equals to 7.97 bits at a low frequency while degraded across the input frequency to reach 7.67 bit at 1.77 GHz.","PeriodicalId":246624,"journal":{"name":"2023 International Microwave and Antenna Symposium (IMAS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An 8-bit 3.5 GS/s Current Steering DAC for Wireless Applications\",\"authors\":\"Mohamed Taha, Khaled M. Morsi, Ahmed A. Naguib\",\"doi\":\"10.1109/IMAS55807.2023.10066935\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A segmented 8-bit 3.54 GS/s current-steering digital-to-analog converter (CSDAC) designed and simulated in 130 nm CMOS technology. The spurious-free dynamic range (SFDR) that represents the CSDAC linearity is ranged from 65.7 dB at 11 MHz signal frequency to 54 dB at 1.770 GHz with an effective number of bits (ENOB) equals to 7.97 bits at a low frequency while degraded across the input frequency to reach 7.67 bit at 1.77 GHz.\",\"PeriodicalId\":246624,\"journal\":{\"name\":\"2023 International Microwave and Antenna Symposium (IMAS)\",\"volume\":\"47 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-02-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 International Microwave and Antenna Symposium (IMAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMAS55807.2023.10066935\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 International Microwave and Antenna Symposium (IMAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMAS55807.2023.10066935","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An 8-bit 3.5 GS/s Current Steering DAC for Wireless Applications
A segmented 8-bit 3.54 GS/s current-steering digital-to-analog converter (CSDAC) designed and simulated in 130 nm CMOS technology. The spurious-free dynamic range (SFDR) that represents the CSDAC linearity is ranged from 65.7 dB at 11 MHz signal frequency to 54 dB at 1.770 GHz with an effective number of bits (ENOB) equals to 7.97 bits at a low frequency while degraded across the input frequency to reach 7.67 bit at 1.77 GHz.