将IEEE标准1149.1集成到门阵列中的问题

Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's Pub Date : 1991-04-15 DOI:10.1109/VTEST.1991.208139

Robert Cortez, R. Dandapani, Mike Yeager

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摘要

由于表面贴装技术的发展，在生产和现场使用边界扫描测试系统变得更加重要。IEEE标准1149.1提供了实现边界扫描的文档化方法。联合技术微电子中心(UTMC)将该标准集成到ASIC门阵列中;本文介绍了实现，并解决了在标准中没有具体涉及的集成所产生的问题。

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Issues of integrating the IEEE Std 1149.1 into a gate array

Use of boundary-scan to test systems at the production and field levels has taken on a greater importance due to the development of surface mount technology. The IEEE Standard 1149.1 offers a documented approach to the implementation of boundary-scan. United Technologies Microelectronics Center (UTMC) integrated the standard into an ASIC gate array; this paper presents that implementation and addresses issues arising from the integration not covered specifically in the standard.<>

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Digest of Papers 1991 VLSI Test Symposium 'Chip-to-System Test Concerns for the 90's

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