{"title":"用于航空航天应用的FPGA布局中的电源和信号完整性研究","authors":"R. Perez","doi":"10.1109/EMCSI.2018.8495292","DOIUrl":null,"url":null,"abstract":"Design principles concerning the use of FPGA are of particular importance in aerospace applications since the neglect of such design principles can cause catastrophic effects in aerospace system, as it will be explainedin this paper. FPGA design rules such as power conditioning and signal integrity for properly interfacing high speed FPGA with its interface circuits are discussed in this paper as it relates to aerospace systems. Signal integrity to avoid crosstalk within a FPGA has not been a great concern because most of the attention over the years had been on signal integrity at the PCB level. However, this paper shows a real example of crosstalk within a FPGA in an aerospace application.","PeriodicalId":120342,"journal":{"name":"2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2018-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Power and Signal Integrity Findings in a FPGA Layout for an Aerospace Application\",\"authors\":\"R. Perez\",\"doi\":\"10.1109/EMCSI.2018.8495292\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design principles concerning the use of FPGA are of particular importance in aerospace applications since the neglect of such design principles can cause catastrophic effects in aerospace system, as it will be explainedin this paper. FPGA design rules such as power conditioning and signal integrity for properly interfacing high speed FPGA with its interface circuits are discussed in this paper as it relates to aerospace systems. Signal integrity to avoid crosstalk within a FPGA has not been a great concern because most of the attention over the years had been on signal integrity at the PCB level. However, this paper shows a real example of crosstalk within a FPGA in an aerospace application.\",\"PeriodicalId\":120342,\"journal\":{\"name\":\"2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EMCSI.2018.8495292\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE Symposium on Electromagnetic Compatibility, Signal Integrity and Power Integrity (EMC, SI & PI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EMCSI.2018.8495292","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Power and Signal Integrity Findings in a FPGA Layout for an Aerospace Application
Design principles concerning the use of FPGA are of particular importance in aerospace applications since the neglect of such design principles can cause catastrophic effects in aerospace system, as it will be explainedin this paper. FPGA design rules such as power conditioning and signal integrity for properly interfacing high speed FPGA with its interface circuits are discussed in this paper as it relates to aerospace systems. Signal integrity to avoid crosstalk within a FPGA has not been a great concern because most of the attention over the years had been on signal integrity at the PCB level. However, this paper shows a real example of crosstalk within a FPGA in an aerospace application.