{"title":"高阶合成Geant4粒子输运在FPGA上的应用","authors":"Ramakant Joshi, Kuruvilla Varghese","doi":"10.1109/DSD57027.2022.00020","DOIUrl":null,"url":null,"abstract":"Geant4 is a software toolkit that simulates particle transport in matter and is widely used in high energy, nuclear, and medical physics applications. As target applications become more complex and time-critical, there is a need to explore custom hardware implementations of the code to reduce simulation times. Since the toolkit is written in $\\mathrm{C}++$, targeting a hand-coded RTL implementation is not feasible. In such scenarios, High-Level synthesis provides a promising alternative to synthesize untimed $\\mathbf{C}/\\mathbf{C}++$ code into optimized hardware. This paper presents the methodologies used to synthesize and optimize the Geant4 code for FPGA using High-Level synthesis, highlighting the challenges faced in the source-to-source transformation. We implement the Geant4 Tracking Algorithm taking Photon Transport in Water as the use case and comparing it with software implementation for functionality and performance. The scope of extending the methodology to complex use cases and its limitations are also discussed. The final implementation is based on the Xilinx Vitis tool flow targeted to the Xilinx Alveo U250 FPGA card.","PeriodicalId":211723,"journal":{"name":"2022 25th Euromicro Conference on Digital System Design (DSD)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-Level Synthesis of Geant4 Particle Transport Application for FPGA\",\"authors\":\"Ramakant Joshi, Kuruvilla Varghese\",\"doi\":\"10.1109/DSD57027.2022.00020\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Geant4 is a software toolkit that simulates particle transport in matter and is widely used in high energy, nuclear, and medical physics applications. As target applications become more complex and time-critical, there is a need to explore custom hardware implementations of the code to reduce simulation times. Since the toolkit is written in $\\\\mathrm{C}++$, targeting a hand-coded RTL implementation is not feasible. In such scenarios, High-Level synthesis provides a promising alternative to synthesize untimed $\\\\mathbf{C}/\\\\mathbf{C}++$ code into optimized hardware. This paper presents the methodologies used to synthesize and optimize the Geant4 code for FPGA using High-Level synthesis, highlighting the challenges faced in the source-to-source transformation. We implement the Geant4 Tracking Algorithm taking Photon Transport in Water as the use case and comparing it with software implementation for functionality and performance. The scope of extending the methodology to complex use cases and its limitations are also discussed. The final implementation is based on the Xilinx Vitis tool flow targeted to the Xilinx Alveo U250 FPGA card.\",\"PeriodicalId\":211723,\"journal\":{\"name\":\"2022 25th Euromicro Conference on Digital System Design (DSD)\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-08-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 25th Euromicro Conference on Digital System Design (DSD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DSD57027.2022.00020\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 25th Euromicro Conference on Digital System Design (DSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSD57027.2022.00020","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High-Level Synthesis of Geant4 Particle Transport Application for FPGA
Geant4 is a software toolkit that simulates particle transport in matter and is widely used in high energy, nuclear, and medical physics applications. As target applications become more complex and time-critical, there is a need to explore custom hardware implementations of the code to reduce simulation times. Since the toolkit is written in $\mathrm{C}++$, targeting a hand-coded RTL implementation is not feasible. In such scenarios, High-Level synthesis provides a promising alternative to synthesize untimed $\mathbf{C}/\mathbf{C}++$ code into optimized hardware. This paper presents the methodologies used to synthesize and optimize the Geant4 code for FPGA using High-Level synthesis, highlighting the challenges faced in the source-to-source transformation. We implement the Geant4 Tracking Algorithm taking Photon Transport in Water as the use case and comparing it with software implementation for functionality and performance. The scope of extending the methodology to complex use cases and its limitations are also discussed. The final implementation is based on the Xilinx Vitis tool flow targeted to the Xilinx Alveo U250 FPGA card.