一个110dB三元PWM电流模式音频DAC与单片2Vrms驱动

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519) Pub Date : 2004-09-13 DOI:10.1109/ISSCC.2004.1332749

Timothy T. Rueger, B. Duewer, Stephen T. Hodapp, T. Lei, J. Melanson, Brian David Trotter

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引用次数: 14

摘要

A /spl Delta//spl Sigma/ audio DAC采用4b量化器，三元PWM编码和半数字电流模式fir，动态范围为110dB，超过20kHz。该IC可实现-99dB的THD，将单端2V/sub rms/信号驱动到5k/spl ω /负载。模具面积为5.98mm/sup 2/，在0.35/spl mu/m/3.3V工艺中使用3/spl mu/m/18V模块。

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A 110dB ternary PWM current-mode audio DAC with monolithic 2Vrms driver

A /spl Delta//spl Sigma/ audio DAC uses a 4b quantizer, ternary PWM encoding, and semidigital current-mode FIRs for 110dB dynamic range over 20kHz. The IC achieves -99dB THD driving a single-ended 2V/sub rms/ signal into a 5k/spl Omega/ load. Die area is 5.98mm/sup 2/ in a 0.35/spl mu/m/3.3V process with a 3/spl mu/m/18V module.

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来源期刊

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

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