{"title":"HEVC解码器在Zynq SoC平台上的高效实现","authors":"L. Ayadi, H. Loukil, M. A. B. Ayed, N. Masmoudi","doi":"10.1109/ATSIP.2018.8364342","DOIUrl":null,"url":null,"abstract":"In this paper, we present an efficient implementation of High Efficiency Video Coding (HEVC) decoder on Zynq SoC Platform under embedded Linux operating system. HM10.0 reference software decoder has been implemented using HW/SW co-design approach to speed it up in order to reach real-time performance. In fact, hardware acceleration of the interpolation filters, which are the most computationally intensive parts of HEVC decoder, has been achieved. The functionality of the proposed hardware architecture was validated, profiled then analyzed in terms of resource utilization, execution time, and energy consumption.","PeriodicalId":332253,"journal":{"name":"2018 4th International Conference on Advanced Technologies for Signal and Image Processing (ATSIP)","volume":"360 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Efficient implementation of HEVC decoder on Zynq SoC platform\",\"authors\":\"L. Ayadi, H. Loukil, M. A. B. Ayed, N. Masmoudi\",\"doi\":\"10.1109/ATSIP.2018.8364342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we present an efficient implementation of High Efficiency Video Coding (HEVC) decoder on Zynq SoC Platform under embedded Linux operating system. HM10.0 reference software decoder has been implemented using HW/SW co-design approach to speed it up in order to reach real-time performance. In fact, hardware acceleration of the interpolation filters, which are the most computationally intensive parts of HEVC decoder, has been achieved. The functionality of the proposed hardware architecture was validated, profiled then analyzed in terms of resource utilization, execution time, and energy consumption.\",\"PeriodicalId\":332253,\"journal\":{\"name\":\"2018 4th International Conference on Advanced Technologies for Signal and Image Processing (ATSIP)\",\"volume\":\"360 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-03-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 4th International Conference on Advanced Technologies for Signal and Image Processing (ATSIP)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATSIP.2018.8364342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 4th International Conference on Advanced Technologies for Signal and Image Processing (ATSIP)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATSIP.2018.8364342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Efficient implementation of HEVC decoder on Zynq SoC platform
In this paper, we present an efficient implementation of High Efficiency Video Coding (HEVC) decoder on Zynq SoC Platform under embedded Linux operating system. HM10.0 reference software decoder has been implemented using HW/SW co-design approach to speed it up in order to reach real-time performance. In fact, hardware acceleration of the interpolation filters, which are the most computationally intensive parts of HEVC decoder, has been achieved. The functionality of the proposed hardware architecture was validated, profiled then analyzed in terms of resource utilization, execution time, and energy consumption.
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