{"title":"使用位真数据流分析处理器特定的源代码优化","authors":"H. Falk, J. Wagner, André Schaefer","doi":"10.1109/ESTMED.2006.321286","DOIUrl":null,"url":null,"abstract":"Nowadays, key characteristics of a processor's instruction set are only exploited in high-level languages by using inline assembly or compiler intrinsics. Inserting intrinsics into the source code is up to the programmer, since only few automatic approaches exist. Additionally, these approaches base on simple code pattern matching strategies. This paper presents techniques for processor-specific code analysis and optimization at the source-level. It is shown how a bit-true dataflow analysis is made applicable for source code analysis for the TI C6x DSPs for the very first time. Based on this bit-true analysis, fully automated optimizations superior to conventional pattern matching techniques are presented which optimize saturated arithmetic, reduce bitwidths of variables and exploit SIMD data processing within source codes. The application of our implemented algorithms to complex real-life codes leads to speed-ups between 33%-48% for the optimization of saturated arithmetic, and up to 16% after SIMD optimization","PeriodicalId":266183,"journal":{"name":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization\",\"authors\":\"H. Falk, J. Wagner, André Schaefer\",\"doi\":\"10.1109/ESTMED.2006.321286\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Nowadays, key characteristics of a processor's instruction set are only exploited in high-level languages by using inline assembly or compiler intrinsics. Inserting intrinsics into the source code is up to the programmer, since only few automatic approaches exist. Additionally, these approaches base on simple code pattern matching strategies. This paper presents techniques for processor-specific code analysis and optimization at the source-level. It is shown how a bit-true dataflow analysis is made applicable for source code analysis for the TI C6x DSPs for the very first time. Based on this bit-true analysis, fully automated optimizations superior to conventional pattern matching techniques are presented which optimize saturated arithmetic, reduce bitwidths of variables and exploit SIMD data processing within source codes. The application of our implemented algorithms to complex real-life codes leads to speed-ups between 33%-48% for the optimization of saturated arithmetic, and up to 16% after SIMD optimization\",\"PeriodicalId\":266183,\"journal\":{\"name\":\"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTMED.2006.321286\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE/ACM/IFIP Workshop on Embedded Systems for Real Time Multimedia","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTMED.2006.321286","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization
Nowadays, key characteristics of a processor's instruction set are only exploited in high-level languages by using inline assembly or compiler intrinsics. Inserting intrinsics into the source code is up to the programmer, since only few automatic approaches exist. Additionally, these approaches base on simple code pattern matching strategies. This paper presents techniques for processor-specific code analysis and optimization at the source-level. It is shown how a bit-true dataflow analysis is made applicable for source code analysis for the TI C6x DSPs for the very first time. Based on this bit-true analysis, fully automated optimizations superior to conventional pattern matching techniques are presented which optimize saturated arithmetic, reduce bitwidths of variables and exploit SIMD data processing within source codes. The application of our implemented algorithms to complex real-life codes leads to speed-ups between 33%-48% for the optimization of saturated arithmetic, and up to 16% after SIMD optimization