去耦电容距离增加时的功率和基准面阻抗测定

Bruce Archambeauk, Juan Wang, Samuel Connor
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引用次数: 12

摘要

功率和接地参考平面分析传统上关注的是整个印刷电路板和由平行平面的物理尺寸引起的共振。然而,从功能的角度来看,典型IC内的快速阻抗切换需要电流对IC的电源引脚的快速响应。这是一个局部效应,因为与电路板远角电流相关的环路电感太高,无法提供这种快速电流响应。随着去耦电容的距离增加,去耦电容的数量变化,以及通孔的直径变化,IC电源引脚看到的这种快速电流响应的阻抗特征就是这种努力。最接近的去耦电容对这种快速电流响应有最大的影响,并主导IC电流的响应时间。然后可以使用该阻抗来查找在IC电源引脚处产生的本地噪声电压的量,并且可以产生EMI发射。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Power and ground-reference plane impedance determination as decoupling capacitor distance increases
Power and ground-reference plane analysis traditionally has focused on the overall printed circuit board and the resonances that result from the physical size of the parallel planes. However, from a functionality point of view, the rapid impedance switching within typical ICs require a fast response in the current to the power pins of the IC. This is a local effect, since the loop inductance associated with currents from far corners of the board will be too high to provide this rapid current response. This effort characterized the impedance to this rapid current response seen by the IC power pin as the distance to the decoupling capacitor is increased, as the number of decoupling capacitors is varied, and as the diameter of the via is varied. The closest decoupling capacitor has the greatest effect on this rapid current response and dominates the response time for the IC current. This impedance can then be used to find the amount of noise voltage created locally at the IC power pins, and which can create EMI emissions.
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