用于高性能CMOS逻辑的室温熔接互连技术

F. Roustaie, S. Quednau, F. Weissenborn, O. Birlem, David Riehl, Xiang Ding, Andreas Kramer, K. Hofmann
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引用次数: 0

摘要

在这项工作中,我们报告了一种新的基于金属纳米线的室温键合技术,即所谓的klet12ding。该技术可用于连接具有低至$5\ \mathrm{m}$边缘长度凸起和细间距小于$8 \mathrm{m}$的倒装芯片。该工艺预计适用于晶圆到晶圆(d2w)或晶圆到晶圆(w2w)键合。倒装芯片、二极管、IGBT、mosfet、$\mu \ mathm {C}$、视频芯片、led和传感器所需的键合压力范围为1至15 MPa。这些接头的抗剪强度为15至60 MPa。这种接触在第一个结果中显示出在350 W/mK范围内的高热导率。此外,该接头可以承受高于500°C的温度。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Room Temperature KlettWelding Interconnect Technology for High Performance CMOS Logic
In this work we report a novel room temperature bonding technology based on metallic NanoWires, so-called KlettWelding. This technology can be used for bonding Flip-Chips with down to $5\ \mu\mathrm{m}$ edge length bumps and fine pitches less than $8 \mu\mathrm{m}$. The process is expected to work for die to wafer (d2w) or wafer to wafer (w2w) bonding. The required bonding pressures range from 1 to 15 MPa for flip chips, Diodes, IGBT, MOSFETS, $\mu \mathrm{C}$, Video chips, LEDs and sensors. The measured shear strength of these connections yields 15 to 60 MPa. Such contacts have shown in the first results a high thermal conductance in the range of 350 W/mK. Also, the connections can tolerate temperatures higher than 500 °C.
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