Linear Feedback Shift Register Reseeding for Stochastic Circuit Repairing and Minimization

Stochastic computing (SC) is a re-emerging paradigm to realize complicated computation by simple circuitry. Although SC has strong tolerance to bit flip errors, manufacturing defects may still cause unacceptably large computation errors. SC circuits commonly adopt linear feedback shift registers (LFSRs) for stochastic bit stream generation. In this study, we observe that the computation error of a faulty LFSR-based SC circuit can be reduced by LFSR reseeding. We propose novel methods to use LFSR reseeding to 1) repair a faulty SC circuit and 2) minimize an SC circuit by constant replacement. Our experiments show the effectiveness of our proposed methods. Notably, the proposed SC circuit minimization method achieves an average 36% area-delay product reduction over the state-of-the-art fully-shared LFSR design with no reduction of the computation accuracy.