A memristor-based 6T1M hybrid memory cell without state drift during successive read

This research proposes a new 6T1M memory structure, which is designed using 6 transistors and a single memristor. The proposed cell is capable of storing data in bidirectional fashion. This memory model is not only space efficient but also operates faster than other conventional structures. It does not require any refresh operation as it prevents state drift during successive read operation. Extensive simulation results by employing LTspice demonstrates the excellent performance and competency in terms of write time, read time and power dissipation of the proposed model.