基于总线的多处理器缓存注入

A. Milenković, V. Milutinovic
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引用次数: 12

摘要

软件控制的缓存预取和数据转发是共享内存多处理器中广泛使用的容忍内存延迟的技术。然而,先前的一些研究表明,在基于总线的多处理器上,缓存预取并不那么有效,而在这种环境下,数据转发的有效性尚未得到探讨。本文提出了一种新的缓存注入技术。缓存注入,调整到基于总线的架构的属性,结合了缓存预取和数据转发的优点。一些初步实验表明,该解决方案可以显著降低写共享数据盛行的应用程序的总体失误率和总线流量。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cache injection on bus based multiprocessors
Software-controlled cache prefetching and data forwarding are widely used techniques for tolerating memory latency in shared memory multiprocessors. However, some previous studies show that cache prefetching is not so effective on bus-based multiprocessors, while the effectiveness of data forwarding has not been explored in this environment, yet. In this paper, a novel technique called cache injection is proposed. Cache injection, tuned to the properties of bus-based architectures, combines advantages of both cache prefetching and data forwarding. Some preliminary experiments show that the proposed solution can significantly help in reducing the overall miss ratio and bus traffic in applications where write-shared data prevails.
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