Jorge Martínez-Carballido, Jorge Guevara-Escobedo, J. Ramírez-Cortés, R. A. Palomares
{"title":"多边形顶点提取的FPGA设计与实现","authors":"Jorge Martínez-Carballido, Jorge Guevara-Escobedo, J. Ramírez-Cortés, R. A. Palomares","doi":"10.1109/CONIELECOMP.2011.5749363","DOIUrl":null,"url":null,"abstract":"This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduces time in the development of prototype solutions using FPGAs.","PeriodicalId":432662,"journal":{"name":"CONIELECOMP 2011, 21st International Conference on Electrical Communications and Computers","volume":"123 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"FPGA design and implementation for vertex extraction of polygonal shapes\",\"authors\":\"Jorge Martínez-Carballido, Jorge Guevara-Escobedo, J. Ramírez-Cortés, R. A. Palomares\",\"doi\":\"10.1109/CONIELECOMP.2011.5749363\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduces time in the development of prototype solutions using FPGAs.\",\"PeriodicalId\":432662,\"journal\":{\"name\":\"CONIELECOMP 2011, 21st International Conference on Electrical Communications and Computers\",\"volume\":\"123 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"CONIELECOMP 2011, 21st International Conference on Electrical Communications and Computers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CONIELECOMP.2011.5749363\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"CONIELECOMP 2011, 21st International Conference on Electrical Communications and Computers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CONIELECOMP.2011.5749363","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
FPGA design and implementation for vertex extraction of polygonal shapes
This work focuses on developing systems of blocks in SIMULINK and VHDL to reuse on design of applications involving the recognition of polygonal objects. Usage of this work reduces time in the development of prototype solutions using FPGAs.