{"title":"PA-RISC 2.0架构中的64位和多媒体扩展","authors":"R. Lee, Jerome C. Huck","doi":"10.1109/CMPCON.1996.501762","DOIUrl":null,"url":null,"abstract":"This paper describes the architectural extensions to the PA-RISC 1.1 architecture to enable 64-bit processing of integers and pointers. It also describes MAX, the Multi-media Acceleration eXtensions which speed up the processing of multimedia and other applications with parallelism at the intra instruction, or subword, level. Other additions to the PA-RISC 2.0 architecture include performance enhancements with respect to memory hierarchy management, branch penalty reduction, and floating-point performance.","PeriodicalId":117038,"journal":{"name":"COMPCON '96. Technologies for the Information Superhighway Digest of Papers","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-02-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"40","resultStr":"{\"title\":\"64-bit and multimedia extensions in the PA-RISC 2.0 architecture\",\"authors\":\"R. Lee, Jerome C. Huck\",\"doi\":\"10.1109/CMPCON.1996.501762\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes the architectural extensions to the PA-RISC 1.1 architecture to enable 64-bit processing of integers and pointers. It also describes MAX, the Multi-media Acceleration eXtensions which speed up the processing of multimedia and other applications with parallelism at the intra instruction, or subword, level. Other additions to the PA-RISC 2.0 architecture include performance enhancements with respect to memory hierarchy management, branch penalty reduction, and floating-point performance.\",\"PeriodicalId\":117038,\"journal\":{\"name\":\"COMPCON '96. Technologies for the Information Superhighway Digest of Papers\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-02-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"40\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"COMPCON '96. Technologies for the Information Superhighway Digest of Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CMPCON.1996.501762\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"COMPCON '96. Technologies for the Information Superhighway Digest of Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CMPCON.1996.501762","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
64-bit and multimedia extensions in the PA-RISC 2.0 architecture
This paper describes the architectural extensions to the PA-RISC 1.1 architecture to enable 64-bit processing of integers and pointers. It also describes MAX, the Multi-media Acceleration eXtensions which speed up the processing of multimedia and other applications with parallelism at the intra instruction, or subword, level. Other additions to the PA-RISC 2.0 architecture include performance enhancements with respect to memory hierarchy management, branch penalty reduction, and floating-point performance.
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