{"title":"基于fpga的低成本嵌入式指纹验证与匹配系统","authors":"M. Barrenechea, J. Altuna, M. S. Miguel","doi":"10.1109/WISES.2007.4408496","DOIUrl":null,"url":null,"abstract":"The development of a fingerprint verification system on a low-cost embedded platform is an open issue in nowadays biometrics. Our paper describes a low-cost fingerprint minutiae extraction and matching system based on a Spartan3 family FPGA with an embedded Leon2 open core processor. The proposed system architecture incorporates a floating point unit and a discrete Fourier transform coprocessor to accelerate the minutiae extraction process. The whole verification algorithm is based on the NFIS version 2 open source software developed by the national institute of standards and technology (NIST). The results on execution time reduction and FPGA occupation for different system configurations show that the proposed architecture improves substantially the performance of the baseline system architecture.","PeriodicalId":319643,"journal":{"name":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"21","resultStr":"{\"title\":\"A Low-Cost FPGA-based Embedded Fingerprint Verification and Matching System\",\"authors\":\"M. Barrenechea, J. Altuna, M. S. Miguel\",\"doi\":\"10.1109/WISES.2007.4408496\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The development of a fingerprint verification system on a low-cost embedded platform is an open issue in nowadays biometrics. Our paper describes a low-cost fingerprint minutiae extraction and matching system based on a Spartan3 family FPGA with an embedded Leon2 open core processor. The proposed system architecture incorporates a floating point unit and a discrete Fourier transform coprocessor to accelerate the minutiae extraction process. The whole verification algorithm is based on the NFIS version 2 open source software developed by the national institute of standards and technology (NIST). The results on execution time reduction and FPGA occupation for different system configurations show that the proposed architecture improves substantially the performance of the baseline system architecture.\",\"PeriodicalId\":319643,\"journal\":{\"name\":\"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems\",\"volume\":\"24 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-06-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"21\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WISES.2007.4408496\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Fifth Workshop on Intelligent Solutions in Embedded Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WISES.2007.4408496","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low-Cost FPGA-based Embedded Fingerprint Verification and Matching System
The development of a fingerprint verification system on a low-cost embedded platform is an open issue in nowadays biometrics. Our paper describes a low-cost fingerprint minutiae extraction and matching system based on a Spartan3 family FPGA with an embedded Leon2 open core processor. The proposed system architecture incorporates a floating point unit and a discrete Fourier transform coprocessor to accelerate the minutiae extraction process. The whole verification algorithm is based on the NFIS version 2 open source software developed by the national institute of standards and technology (NIST). The results on execution time reduction and FPGA occupation for different system configurations show that the proposed architecture improves substantially the performance of the baseline system architecture.