A New Spread Spectrum Clock Generator for SATA Using Double Modulation Schemes

A new spread spectrum clock generator (SSCG) using double modulation is presented in this paper. Not only the divider is varied, but also the voltage controlled oscillator is modulated. This technique can enhance the modulation bandwidth so that the effect of EMI suppression is improved and can optimize the jitter caused by the SigmaDelta modulator. In addition, the method of two-path is applied to reduce the capacitance value such that the total integration can be achieved. The proposed SSCG has been fabricated in a 0.18 mum CMOS process. The clock of 1.5 GHz with down spread ratio of 0.5% is realized for applications to serial ATA. The 19.63dB EMI reduction (RBW=10 KHz) and 35 ps-pp period jitter are achieved in this study. The size of chip area is 0.44times0.48 mm2. The power consumption is 27 mW.