飞焦耳,高速平面GaAs E-JFET逻辑

R. Zuleeg, J. Notthoff, P. E. Friebertshauser, G. Troeger
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引用次数: 13

摘要

采用选择性离子注入技术制备了GaAs增强型结场效应晶体管(=E-JFET)的平面集成电路。制作了一个九级环形振荡器,作为评估数字应用中速度-功率产品的测试载体。实验结果与理论预测的相关性揭示了具有大规模集成电路能力的短通道器件的飞焦耳开关特性。比较了GaAs耗尽型金属半导体场效应晶体管(=D-MESFET)与E-JFET的逻辑门性能和集成电路性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Femto-Joule, high-speed planar GaAs E-JFET logic
Selective ion implantation was utilized to fabricate planar integrated circuits with GaAs enhancement-mode junction field-effect transistors (=E-JFET). A nine-stage ring oscillator was fabricated and served as a test vehicle for assessing the speed-power product for digital applications. Correlation of experimental results with theoretical predictions revealed femto-Joule switching characteristics of short-channel devices with LSI capability. The GaAs depletion-mode metal semiconductor field-effect transistor (=D-MESFET) logic gate performance and IC capability were compared with those of the E-JFET.
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