实现直流链路电压平衡的级联z源拓扑分析

Muhammad M. Roomi, M. Tariq, Bin Zhao
{"title":"实现直流链路电压平衡的级联z源拓扑分析","authors":"Muhammad M. Roomi, M. Tariq, Bin Zhao","doi":"10.1109/PEDES49360.2020.9379675","DOIUrl":null,"url":null,"abstract":"Cascaded Z-Source topology coupled with a three-level diode clamped inverter provides an alternative multilevel buck-boost power conversion. Z-Source Inverter utilizes the shoot through states to conjoin the diode clamped inverter with one of the sources in the cascaded Z-Source topology. This unique integration during the shoot through states of the inverter facilitates the boosting of the three-level output voltage. In this paper, de-link voltage balancing of the cascaded topology when the input sources are non-identical is proposed. Reference disposition modulation method is utilized to couple the inverter to the Z-Source topology. The mathematical modelling of the cascaded impedance networks for the non-identical condition is derived in this paper. The circuit analysis proves that the de-link voltage balancing is attainable by carefully adjusting the duty cycle of the shoot through states. Subsequently, simulations results carried out in MATLAB/Simulink platforms validate the mathematical modelling of the cascaded Z-Source topology.","PeriodicalId":124226,"journal":{"name":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","volume":"295 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Analysis of Cascaded Z-Source Topology Implementing DC-Link Voltage Balancing\",\"authors\":\"Muhammad M. Roomi, M. Tariq, Bin Zhao\",\"doi\":\"10.1109/PEDES49360.2020.9379675\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cascaded Z-Source topology coupled with a three-level diode clamped inverter provides an alternative multilevel buck-boost power conversion. Z-Source Inverter utilizes the shoot through states to conjoin the diode clamped inverter with one of the sources in the cascaded Z-Source topology. This unique integration during the shoot through states of the inverter facilitates the boosting of the three-level output voltage. In this paper, de-link voltage balancing of the cascaded topology when the input sources are non-identical is proposed. Reference disposition modulation method is utilized to couple the inverter to the Z-Source topology. The mathematical modelling of the cascaded impedance networks for the non-identical condition is derived in this paper. The circuit analysis proves that the de-link voltage balancing is attainable by carefully adjusting the duty cycle of the shoot through states. Subsequently, simulations results carried out in MATLAB/Simulink platforms validate the mathematical modelling of the cascaded Z-Source topology.\",\"PeriodicalId\":124226,\"journal\":{\"name\":\"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)\",\"volume\":\"295 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-12-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PEDES49360.2020.9379675\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PEDES49360.2020.9379675","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

级联z源拓扑与三电平二极管箝位逆变器相结合,提供了一种可选的多电平降压-升压功率转换。z源逆变器利用射通状态将二极管箝位逆变器与级联z源拓扑中的一个源连接起来。这种独特的集成在通过状态的逆变器有利于提高三电平输出电压。本文提出了当输入源不相同时,级联拓扑的解链电压平衡问题。采用参考配置调制方法将逆变器与z源拓扑耦合。本文推导了非相同条件下级联阻抗网络的数学模型。电路分析证明,通过仔细调整射通状态的占空比,可以实现脱链电压平衡。随后,在MATLAB/Simulink平台上进行了仿真,验证了级联z源拓扑的数学建模。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Analysis of Cascaded Z-Source Topology Implementing DC-Link Voltage Balancing
Cascaded Z-Source topology coupled with a three-level diode clamped inverter provides an alternative multilevel buck-boost power conversion. Z-Source Inverter utilizes the shoot through states to conjoin the diode clamped inverter with one of the sources in the cascaded Z-Source topology. This unique integration during the shoot through states of the inverter facilitates the boosting of the three-level output voltage. In this paper, de-link voltage balancing of the cascaded topology when the input sources are non-identical is proposed. Reference disposition modulation method is utilized to couple the inverter to the Z-Source topology. The mathematical modelling of the cascaded impedance networks for the non-identical condition is derived in this paper. The circuit analysis proves that the de-link voltage balancing is attainable by carefully adjusting the duty cycle of the shoot through states. Subsequently, simulations results carried out in MATLAB/Simulink platforms validate the mathematical modelling of the cascaded Z-Source topology.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信