{"title":"短沟道SOI晶体管的二维数值模拟","authors":"G. A. Armstrong, N. Thomas, J.R. Davis","doi":"10.1109/SOI.1988.95399","DOIUrl":null,"url":null,"abstract":"A two-dimensional device simulator, based on the finite-difference discretization has been developed to analyse the DC characteristics of thin-film SOI transistors. The simulation incorporate a model for avalanche generation at the drain junction, together with both bulk and surface recombination with the SOI film. The simulator has been used to model the characteristics of both p-channel and n-channel transistors fabricated on the same substrate. Accurate simulation of threshold voltage for both types of transistor has been achieved by incorporating a model for excess donor states created during oxygen implantation. The simulator has been used to investigate some of the limitations on the performance of 1- mu m transistors at high drain bias. The results are discussed briefly and qualitatively.<<ETX>>","PeriodicalId":391934,"journal":{"name":"Proceedings. SOS/SOI Technology Workshop","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-10-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Two-dimensional numerical simulation of short channel SOI transistors\",\"authors\":\"G. A. Armstrong, N. Thomas, J.R. Davis\",\"doi\":\"10.1109/SOI.1988.95399\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A two-dimensional device simulator, based on the finite-difference discretization has been developed to analyse the DC characteristics of thin-film SOI transistors. The simulation incorporate a model for avalanche generation at the drain junction, together with both bulk and surface recombination with the SOI film. The simulator has been used to model the characteristics of both p-channel and n-channel transistors fabricated on the same substrate. Accurate simulation of threshold voltage for both types of transistor has been achieved by incorporating a model for excess donor states created during oxygen implantation. The simulator has been used to investigate some of the limitations on the performance of 1- mu m transistors at high drain bias. The results are discussed briefly and qualitatively.<<ETX>>\",\"PeriodicalId\":391934,\"journal\":{\"name\":\"Proceedings. SOS/SOI Technology Workshop\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-10-03\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings. SOS/SOI Technology Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1988.95399\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. SOS/SOI Technology Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1988.95399","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Two-dimensional numerical simulation of short channel SOI transistors
A two-dimensional device simulator, based on the finite-difference discretization has been developed to analyse the DC characteristics of thin-film SOI transistors. The simulation incorporate a model for avalanche generation at the drain junction, together with both bulk and surface recombination with the SOI film. The simulator has been used to model the characteristics of both p-channel and n-channel transistors fabricated on the same substrate. Accurate simulation of threshold voltage for both types of transistor has been achieved by incorporating a model for excess donor states created during oxygen implantation. The simulator has been used to investigate some of the limitations on the performance of 1- mu m transistors at high drain bias. The results are discussed briefly and qualitatively.<>