P. Stolk, P. Dirksen, C. Juffermans, R. Roes, A. Montree, J. van Wingerden, W.J.M. de Laat, Wendy F. Gehoel-van Ansem, M. Kaiser, J. Kwinten, C. van der Poel
{"title":"用248nm光刻技术制造50nm晶体管","authors":"P. Stolk, P. Dirksen, C. Juffermans, R. Roes, A. Montree, J. van Wingerden, W.J.M. de Laat, Wendy F. Gehoel-van Ansem, M. Kaiser, J. Kwinten, C. van der Poel","doi":"10.1109/VLSIT.2000.852766","DOIUrl":null,"url":null,"abstract":"Using a novel phase-shift mask, 50 nm resolution has been achieved with conventional 248 nm lithography. The addition of so-called scattering bars enables within-die control of linewidths from 250 to 50 nm. Using 200 nm thick resist layers combined with hard mask processing, transistors with gate-lengths down to 50 nm have been fabricated. Well controlled device performance is achieved by optimizing offset spacers and pocket implants.","PeriodicalId":268624,"journal":{"name":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-06-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Making 50 nm transistors with 248 nm lithography\",\"authors\":\"P. Stolk, P. Dirksen, C. Juffermans, R. Roes, A. Montree, J. van Wingerden, W.J.M. de Laat, Wendy F. Gehoel-van Ansem, M. Kaiser, J. Kwinten, C. van der Poel\",\"doi\":\"10.1109/VLSIT.2000.852766\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Using a novel phase-shift mask, 50 nm resolution has been achieved with conventional 248 nm lithography. The addition of so-called scattering bars enables within-die control of linewidths from 250 to 50 nm. Using 200 nm thick resist layers combined with hard mask processing, transistors with gate-lengths down to 50 nm have been fabricated. Well controlled device performance is achieved by optimizing offset spacers and pocket implants.\",\"PeriodicalId\":268624,\"journal\":{\"name\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-06-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2000.852766\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2000.852766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using a novel phase-shift mask, 50 nm resolution has been achieved with conventional 248 nm lithography. The addition of so-called scattering bars enables within-die control of linewidths from 250 to 50 nm. Using 200 nm thick resist layers combined with hard mask processing, transistors with gate-lengths down to 50 nm have been fabricated. Well controlled device performance is achieved by optimizing offset spacers and pocket implants.