编码空间扩展的Moore有限状态机设计

L. Titarenko, O. Hebda, A. Barkalov
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引用次数: 0

摘要

该方法的目标是减少用可编程逻辑阵列(PLA)实现的摩尔有限状态机逻辑电路中的硬件数量。该方法是基于在FSM内部状态代码中使用超过最小数量的变量。该方法包括状态编码的两个阶段。第二阶段是对每一类伪等效状态内的状态进行重新编码。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Design of Moore finite state machine with coding space stretching
The proposed method is targeted on reduction of hardware amount in logic circuit of Moore finite-state machine implemented with programmable logic arrays (PLA). The method is based on using more than minimal amount of variables in codes of FSM internal states. The method includes two stages of state encoding. The second stage is connected with recoding of states inside each class of pseudoequivalent states.
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