新兴SOI技术选项的软错误率缩放

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303) Pub Date : 2002-06-11 DOI:10.1109/VLSIT.2002.1015382

P. Oldiges, K. Bernstein, D. Heidel, B. Klaasen, E. Cannon, R. Dennard, H. Tang, M. Ieong, H.-S.P. Wong

{"title":"新兴SOI技术选项的软错误率缩放","authors":"P. Oldiges, K. Bernstein, D. Heidel, B. Klaasen, E. Cannon, R. Dennard, H. Tang, M. Ieong, H.-S.P. Wong","doi":"10.1109/VLSIT.2002.1015382","DOIUrl":null,"url":null,"abstract":"The soft error rate in SOI devices is explored. Conventional SOI device soft error rate is compared to high mobility SOI and double gate SOI designs. We develop a theoretical understanding of the susceptibility of SOI devices to /spl alpha/-particle induced soft errors by means of simulations and measurements. Although high mobility devices will decrease soft error rate susceptibility, silicon thinning is shown to have a much larger impact. Double gate devices are shown to improve the soft error rate even further.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"30","resultStr":"{\"title\":\"Soft error rate scaling for emerging SOI technology options\",\"authors\":\"P. Oldiges, K. Bernstein, D. Heidel, B. Klaasen, E. Cannon, R. Dennard, H. Tang, M. Ieong, H.-S.P. Wong\",\"doi\":\"10.1109/VLSIT.2002.1015382\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The soft error rate in SOI devices is explored. Conventional SOI device soft error rate is compared to high mobility SOI and double gate SOI designs. We develop a theoretical understanding of the susceptibility of SOI devices to /spl alpha/-particle induced soft errors by means of simulations and measurements. Although high mobility devices will decrease soft error rate susceptibility, silicon thinning is shown to have a much larger impact. Double gate devices are shown to improve the soft error rate even further.\",\"PeriodicalId\":103040,\"journal\":{\"name\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"volume\":\"28 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-06-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"30\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.2002.1015382\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015382","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 30

摘要

探讨了SOI器件的软错误率。将传统SOI器件的软错误率与高迁移率SOI和双栅极SOI设计进行了比较。通过模拟和测量，我们从理论上了解了SOI器件对/spl α /-粒子引起的软误差的敏感性。虽然高迁移率器件将降低软错误率敏感性，但硅薄化显示出更大的影响。双栅器件进一步提高了软错误率。

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Soft error rate scaling for emerging SOI technology options

The soft error rate in SOI devices is explored. Conventional SOI device soft error rate is compared to high mobility SOI and double gate SOI designs. We develop a theoretical understanding of the susceptibility of SOI devices to /spl alpha/-particle induced soft errors by means of simulations and measurements. Although high mobility devices will decrease soft error rate susceptibility, silicon thinning is shown to have a much larger impact. Double gate devices are shown to improve the soft error rate even further.

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来源期刊

2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)

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