采用嵌入式薄膜电容器可显著降低电源/地电感阻抗和同时开关噪声

Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710) Pub Date : 2003-12-08 DOI:10.1109/EPEP.2003.1250015

Hyungsoo Kim, Y. Jeong, Jongbae Park, SeokKyu-lee, JongKuk-Hong, Youngsoo Hong, Joungho Kim

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引用次数: 23

摘要

通过在3GHz频率范围内的高性能封装和PCB中使用嵌入式电容器薄膜，成功地证明了功率/地电感阻抗的显著降低和SSN抑制。电感阻抗的降低和SSN的降低是通过内嵌薄膜电容器内电感的减小来实现的。

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Significant reduction of power/ground inductive impedance and simultaneous switching noise by using embedded film capacitor

Significant reduction of power/ground inductive impedance and SSN suppression was successfully demonstrated by using embedded capacitor film in high performance package and PCB up to 3GHz frequency range. The reduction of the inductance impedance and SSN are acquired by the help of reduced via inductance in the embedded film capacitor.

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Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)

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