{"title":"在深亚微米内置电流传感器中采用I/sub DDQ/输出放大器的可行性","authors":"S. Athan, D. Landis","doi":"10.1109/IDDQ.1996.557822","DOIUrl":null,"url":null,"abstract":"The feasibility of employing an I/sub DDQ/ output MOSFET amplifier in deep submicron CMOS ICs is evaluated. CUT performance is evaluated to determine the impact due to process scaling in the deep submicron regime. Comparisons of area overhead are made between BICS designs with and without the use of an output amplifier.","PeriodicalId":285207,"journal":{"name":"Digest of Papers 1996 IEEE International Workshop on IDDQ Testing","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Feasibility of employing an I/sub DDQ/ output amplifier in deep submicron built-in current sensors\",\"authors\":\"S. Athan, D. Landis\",\"doi\":\"10.1109/IDDQ.1996.557822\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The feasibility of employing an I/sub DDQ/ output MOSFET amplifier in deep submicron CMOS ICs is evaluated. CUT performance is evaluated to determine the impact due to process scaling in the deep submicron regime. Comparisons of area overhead are made between BICS designs with and without the use of an output amplifier.\",\"PeriodicalId\":285207,\"journal\":{\"name\":\"Digest of Papers 1996 IEEE International Workshop on IDDQ Testing\",\"volume\":\"61 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-10-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Digest of Papers 1996 IEEE International Workshop on IDDQ Testing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IDDQ.1996.557822\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Papers 1996 IEEE International Workshop on IDDQ Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDDQ.1996.557822","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Feasibility of employing an I/sub DDQ/ output amplifier in deep submicron built-in current sensors
The feasibility of employing an I/sub DDQ/ output MOSFET amplifier in deep submicron CMOS ICs is evaluated. CUT performance is evaluated to determine the impact due to process scaling in the deep submicron regime. Comparisons of area overhead are made between BICS designs with and without the use of an output amplifier.