{"title":"p型finfet参数随晶圆位置变化的研究","authors":"G. Angelov, M. Spasova, D. Nikolov, R. Rusev","doi":"10.1109/ET.2019.8878503","DOIUrl":null,"url":null,"abstract":"In this paper we study the variability of measured drain current, output characteristics and threshold voltage for 14-nm ${p}$-type FinFETs depending on their location on the silicon wafer-three positions on the wafer are considered. The results showed that the technology is steady with weak parameter variability depending on wafer position.","PeriodicalId":306452,"journal":{"name":"2019 IEEE XXVIII International Scientific Conference Electronics (ET)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Study of p-type FinFETs’ Parameter Variability Depending on Wafer Location\",\"authors\":\"G. Angelov, M. Spasova, D. Nikolov, R. Rusev\",\"doi\":\"10.1109/ET.2019.8878503\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper we study the variability of measured drain current, output characteristics and threshold voltage for 14-nm ${p}$-type FinFETs depending on their location on the silicon wafer-three positions on the wafer are considered. The results showed that the technology is steady with weak parameter variability depending on wafer position.\",\"PeriodicalId\":306452,\"journal\":{\"name\":\"2019 IEEE XXVIII International Scientific Conference Electronics (ET)\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 IEEE XXVIII International Scientific Conference Electronics (ET)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ET.2019.8878503\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE XXVIII International Scientific Conference Electronics (ET)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ET.2019.8878503","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Study of p-type FinFETs’ Parameter Variability Depending on Wafer Location
In this paper we study the variability of measured drain current, output characteristics and threshold voltage for 14-nm ${p}$-type FinFETs depending on their location on the silicon wafer-three positions on the wafer are considered. The results showed that the technology is steady with weak parameter variability depending on wafer position.