低功耗VLSI系统分析与建模技术综述报告

2015 International Conference on Signal Processing and Communication Engineering Systems Pub Date : 1900-01-01 DOI:10.1109/SPACES.2015.7058234

S. R. S. Klavakolanu, M. Raju, Fazal Noorbasha, B. Kanth

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引用次数: 5

摘要

在当前CMOS集成电路技术的发展趋势下，低功耗设计是系统设计中的一个主要问题。为了达到这个标准，应该尽量减少功耗。本文详细讨论了在不同抽象层次上降低功耗的技术。通过本文，设计人员可以很容易地选择合适的方法和合适的优化技术来实现所需的目标。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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A review report on low power VLSI systems analysis and modeling techniques

In the present trend of CMOS IC technology, Low Power Design is a major issue in designing of a system. In order to achieve that criterion, power consumption should be minimized. In this paper, techniques which are available for reduction of power consumption at different abstraction levels are discussed in detail. With this paper, Designer can easily choose the proper methodology with the appropriate optimization technique to achieve the required goal.

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2015 International Conference on Signal Processing and Communication Engineering Systems

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