{"title":"可扩展异步数据流处理器的设计","authors":"H. Lampinen, Pauli Perälä, O. Vainio","doi":"10.1109/DDECS.2006.1649581","DOIUrl":null,"url":null,"abstract":"This paper presents a scalable asynchronous dataflow processor. The main idea of the presented processor architecture is that the processing elements (PEs) are intelligent and can communicate directly with each other. A control element (CE) is used to solve possible conflicts between the data transferring of PEs and to control the execution of the program","PeriodicalId":158707,"journal":{"name":"2006 IEEE Design and Diagnostics of Electronic Circuits and systems","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of a Scalable Asynchronous Dataflow Processor\",\"authors\":\"H. Lampinen, Pauli Perälä, O. Vainio\",\"doi\":\"10.1109/DDECS.2006.1649581\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a scalable asynchronous dataflow processor. The main idea of the presented processor architecture is that the processing elements (PEs) are intelligent and can communicate directly with each other. A control element (CE) is used to solve possible conflicts between the data transferring of PEs and to control the execution of the program\",\"PeriodicalId\":158707,\"journal\":{\"name\":\"2006 IEEE Design and Diagnostics of Electronic Circuits and systems\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 IEEE Design and Diagnostics of Electronic Circuits and systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2006.1649581\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 IEEE Design and Diagnostics of Electronic Circuits and systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2006.1649581","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of a Scalable Asynchronous Dataflow Processor
This paper presents a scalable asynchronous dataflow processor. The main idea of the presented processor architecture is that the processing elements (PEs) are intelligent and can communicate directly with each other. A control element (CE) is used to solve possible conflicts between the data transferring of PEs and to control the execution of the program