复杂嵌入式DSP系统的低功耗设计

C. Gebotys, R. Gebotys
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引用次数: 4

摘要

本文提出了一种低功耗驱动复杂DSP嵌入式系统设计的经验方法。与高性能的DSP设计不同,低功耗DSP设计的研究很少受到重视,而功耗是一个越来越重要和日益突出的问题。推导了DSP软件的高精度功率预测模型。与以往的技术不同,该方法通过统计优化推导出软件功率预测模型,并通过实际功率测量进行验证。该方法具有通用性,适用于任何嵌入式DSP处理器。对两种不同的DSP处理器和180多个DSP代码的功率测量结果表明,对嵌入式系统设计的功率预测误差小于4%。这一结果对于开发嵌入式DSP软件功率特性的通用方法非常重要,因为在许多成本敏感的市场中,低功耗对复杂的DSP应用至关重要。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Designing for low power in complex embedded DSP systems
This paper presents an empirical methodology for low power driven complex DSP embedded systems design. Unlike DSP design for high performance, research of low power DSP design has received little attention, yet power dissipation is an increasingly important and growing problem. Highly accurate power prediction models for DSP software are derived. Unlike previous techniques, the methodology derives software power prediction models using statistical optimization and it is verified with real power measurements. The approach is general enough to be applied to any embedded DSP processor. Results from two different DSP processors and over 180 power measurements of DSP code show that power can be predicted far embedded systems design with less than 4% error. This result is important for developing a general methodology for power characterization of embedded DSP software since low power is critical to complex DSP applications in many cost sensitive markets.
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