应力对CoSi2/Si界面I-V特性影响的第一性原理计算

O. D. Restrepo, Qun Gao, S. Pandey, E. Cruz‐Silva, E. Bazizi
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引用次数: 0

摘要

我们提出了基于从头算的电子输运计算,计算了单轴和双轴应力对CoSi2/n Si界面电阻率在三个主要硅晶体学方向上的影响。对于[001]案例,我们确定了压应力和拉应力两种不同的低和高偏置传导机制。在这些条件下,当偏置为~0.1V时,电流主要由Γ点附近的电子传输路径主导,而当偏置较高时,电流主要由布里渊区(±1/2,±1/2)导带谷处的传输主导,这导致0.2V偏置时接触电阻率降低高达30%。这种效应在[110]方向上不太明显,在[111]情况下可以忽略不计,因为沿这些方向的硅导带谷是对称的。该研究为下一代半导体器件中硅化物界面接触电阻率降低的应力优化途径提供了见解。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
First Principles Calculations of the Effect of Stress in the I-V Characteristics of the CoSi2/Si Interface
We present ab initio-based electronic transport calculations on the effect of uniaxial and bi-axial stress on the CoSi2/n Si interface resistivity for the three main silicon crystallographic directions. For the [001] case, we identify two distinctive low and high bias conduction regimes for both compressive and tensile stress. In these regimes, the current is dominated by electronic transmission pathways near the Γ point for bias up to ~0.1V, while for higher bias it is dominated by transmission at the (±1/2, ±1/2) conduction band valleys of the Brillouin zone, which results in a contact resistivity decrease of up to 30% at 0.2V bias. This effect is less pronounced for the [110] direction, and negligible for the [111] case due to the symmetry of the Si conduction band valleys along these directions. This study provides insight into stress-based optimization pathways for contact resistivity reduction of silicide interfaces in next generation semiconductor devices.
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