铁路控制系统设计与评估的经验教训

A. Amendola, R. Maio, M. L. Iacobuzio, F. Poli, Fernando Scalabrini
{"title":"铁路控制系统设计与评估的经验教训","authors":"A. Amendola, R. Maio, M. L. Iacobuzio, F. Poli, Fernando Scalabrini","doi":"10.1109/WORDS.2003.1267552","DOIUrl":null,"url":null,"abstract":"Demonstrating the safety of modern Railway Control Systems based on microprocessors is more complicated than showing that of traditional relay systems, because the behaviour of microprocessors when faults occur is unpredictable. This paper presents an overview of the main Verification and Validation (V&V) methods used by the Reliability, Availability, Maintainability and Safety (RAMS) team at Ansaldo Segnalamento Ferroviario: how we specify and demonstrate that the system under testing is Reliable, Available, Maintainable and Safe in compliance with the European Railway Standard CENELEC. Tests are executed on a system prototype with an environment simulator and consist of Code Inspection, monitoring I/O Variables, measuring performances by means of a Logic Analyzer, and exercising the diagnostics via a proprietary Fault Injection Board. For critical parts, formal specifications are used (e.g., in SDL).","PeriodicalId":350761,"journal":{"name":"2003 The Ninth IEEE International Workshop on Object-Oriented Real-Time Dependable Systems","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Lessons Learned in Designing and Evaluating Railway Control Systems\",\"authors\":\"A. Amendola, R. Maio, M. L. Iacobuzio, F. Poli, Fernando Scalabrini\",\"doi\":\"10.1109/WORDS.2003.1267552\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Demonstrating the safety of modern Railway Control Systems based on microprocessors is more complicated than showing that of traditional relay systems, because the behaviour of microprocessors when faults occur is unpredictable. This paper presents an overview of the main Verification and Validation (V&V) methods used by the Reliability, Availability, Maintainability and Safety (RAMS) team at Ansaldo Segnalamento Ferroviario: how we specify and demonstrate that the system under testing is Reliable, Available, Maintainable and Safe in compliance with the European Railway Standard CENELEC. Tests are executed on a system prototype with an environment simulator and consist of Code Inspection, monitoring I/O Variables, measuring performances by means of a Logic Analyzer, and exercising the diagnostics via a proprietary Fault Injection Board. For critical parts, formal specifications are used (e.g., in SDL).\",\"PeriodicalId\":350761,\"journal\":{\"name\":\"2003 The Ninth IEEE International Workshop on Object-Oriented Real-Time Dependable Systems\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2003 The Ninth IEEE International Workshop on Object-Oriented Real-Time Dependable Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WORDS.2003.1267552\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 The Ninth IEEE International Workshop on Object-Oriented Real-Time Dependable Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WORDS.2003.1267552","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

展示基于微处理器的现代铁路控制系统的安全性比展示传统继电器系统的安全性更为复杂,因为微处理器在故障发生时的行为是不可预测的。本文概述了Ansaldo Segnalamento Ferroviario可靠性、可用性、可维护性和安全性(RAMS)团队使用的主要验证和验证(V&V)方法:我们如何指定和证明被测系统符合欧洲铁路标准CENELEC的可靠性、可用性、可维护性和安全性。测试在带有环境模拟器的系统原型上执行,包括代码检查、监控I/O变量、通过逻辑分析仪测量性能,以及通过专用故障注入板进行诊断。对于关键部分,使用正式的规范(例如,在SDL中)。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Lessons Learned in Designing and Evaluating Railway Control Systems
Demonstrating the safety of modern Railway Control Systems based on microprocessors is more complicated than showing that of traditional relay systems, because the behaviour of microprocessors when faults occur is unpredictable. This paper presents an overview of the main Verification and Validation (V&V) methods used by the Reliability, Availability, Maintainability and Safety (RAMS) team at Ansaldo Segnalamento Ferroviario: how we specify and demonstrate that the system under testing is Reliable, Available, Maintainable and Safe in compliance with the European Railway Standard CENELEC. Tests are executed on a system prototype with an environment simulator and consist of Code Inspection, monitoring I/O Variables, measuring performances by means of a Logic Analyzer, and exercising the diagnostics via a proprietary Fault Injection Board. For critical parts, formal specifications are used (e.g., in SDL).
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