{"title":"基于零强制预编码的无小区大规模MIMO网络中的去中心化问题","authors":"F. Riera-Palou, G. Femenias","doi":"10.1109/ALLERTON.2019.8919893","DOIUrl":null,"url":null,"abstract":"Cell-free massive MIMO (CF-M-MIMO) systems represent an evolution of the classical cellular architecture that has dominated the mobile landscape for decades. In CF-M-MIMO, a central processing unit (CPU) controls a multitude of access points (APs) that are irregularly scattered throughout the coverage area effectively becoming a fully distributed implementation of the MMIMO technology. As such, it inherits many of the key properties that have made M-MIMO one of the physical layer pillars of 5G systems while opening the door to new features not available in M-MIMO. Among the latest is the possibility of performing the precoding at the CPU (centralized) or at the APs (distributed) with the former known to offer much better performance at the cost of having to collect all the relevant channel state information (CSI) at the CPU. Realistic deployments of cell-free systems are likely to require more than one CPU when the area to be covered is large, thus a critical issue that needs to be solved is how these multiple CPUs should be interconnected. This paper analyzes and proposes designs for different degrees of interconnectivity among the CPUs for the specific case of centralized zero-forcing precoding. Results show that a modest form of CPU interconnection can boost very significantly the max-min rate performance so prevalent in CF-M-MIMO architectures.","PeriodicalId":120479,"journal":{"name":"2019 57th Annual Allerton Conference on Communication, Control, and Computing (Allerton)","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"13","resultStr":"{\"title\":\"Decentralization Issues in Cell-free Massive MIMO Networks with Zero-Forcing Precoding\",\"authors\":\"F. Riera-Palou, G. Femenias\",\"doi\":\"10.1109/ALLERTON.2019.8919893\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Cell-free massive MIMO (CF-M-MIMO) systems represent an evolution of the classical cellular architecture that has dominated the mobile landscape for decades. In CF-M-MIMO, a central processing unit (CPU) controls a multitude of access points (APs) that are irregularly scattered throughout the coverage area effectively becoming a fully distributed implementation of the MMIMO technology. As such, it inherits many of the key properties that have made M-MIMO one of the physical layer pillars of 5G systems while opening the door to new features not available in M-MIMO. Among the latest is the possibility of performing the precoding at the CPU (centralized) or at the APs (distributed) with the former known to offer much better performance at the cost of having to collect all the relevant channel state information (CSI) at the CPU. Realistic deployments of cell-free systems are likely to require more than one CPU when the area to be covered is large, thus a critical issue that needs to be solved is how these multiple CPUs should be interconnected. This paper analyzes and proposes designs for different degrees of interconnectivity among the CPUs for the specific case of centralized zero-forcing precoding. Results show that a modest form of CPU interconnection can boost very significantly the max-min rate performance so prevalent in CF-M-MIMO architectures.\",\"PeriodicalId\":120479,\"journal\":{\"name\":\"2019 57th Annual Allerton Conference on Communication, Control, and Computing (Allerton)\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"13\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 57th Annual Allerton Conference on Communication, Control, and Computing (Allerton)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ALLERTON.2019.8919893\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 57th Annual Allerton Conference on Communication, Control, and Computing (Allerton)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ALLERTON.2019.8919893","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Decentralization Issues in Cell-free Massive MIMO Networks with Zero-Forcing Precoding
Cell-free massive MIMO (CF-M-MIMO) systems represent an evolution of the classical cellular architecture that has dominated the mobile landscape for decades. In CF-M-MIMO, a central processing unit (CPU) controls a multitude of access points (APs) that are irregularly scattered throughout the coverage area effectively becoming a fully distributed implementation of the MMIMO technology. As such, it inherits many of the key properties that have made M-MIMO one of the physical layer pillars of 5G systems while opening the door to new features not available in M-MIMO. Among the latest is the possibility of performing the precoding at the CPU (centralized) or at the APs (distributed) with the former known to offer much better performance at the cost of having to collect all the relevant channel state information (CSI) at the CPU. Realistic deployments of cell-free systems are likely to require more than one CPU when the area to be covered is large, thus a critical issue that needs to be solved is how these multiple CPUs should be interconnected. This paper analyzes and proposes designs for different degrees of interconnectivity among the CPUs for the specific case of centralized zero-forcing precoding. Results show that a modest form of CPU interconnection can boost very significantly the max-min rate performance so prevalent in CF-M-MIMO architectures.