{"title":"基于电抗开关的DC-DC变换器快速响应负载调节","authors":"T. Senanayake, T. Ninomiya, H. Tohya","doi":"10.1109/PESC.2003.1216612","DOIUrl":null,"url":null,"abstract":"The lower output voltage, higher output current and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further burden the problem, power saving \"stop-clock\" modes of the microprocessor has demanded faster and more stable transient response from the DC-DC converter. In this paper a new fast-response DC-DC converter design is presented that will meet the requirements and features of the new generation of microprocessors and digital systems. A novel method of reactance switching is applied to a DC-DC converter, and it provides the prominent features of current amplification and absorption. It produces a high slew rate of load current and keeps output voltage constant in case of severe load changes. The design and simulation of the concept is verified by experiment of 12 V input and 3.3 V/30 A output. Further improvement of transient response is obtained by replacing the output capacitor with a low impedance line component (LILC).","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"81 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Fast-response load regulation of DC-DC converter by means of reactance switching\",\"authors\":\"T. Senanayake, T. Ninomiya, H. Tohya\",\"doi\":\"10.1109/PESC.2003.1216612\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The lower output voltage, higher output current and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further burden the problem, power saving \\\"stop-clock\\\" modes of the microprocessor has demanded faster and more stable transient response from the DC-DC converter. In this paper a new fast-response DC-DC converter design is presented that will meet the requirements and features of the new generation of microprocessors and digital systems. A novel method of reactance switching is applied to a DC-DC converter, and it provides the prominent features of current amplification and absorption. It produces a high slew rate of load current and keeps output voltage constant in case of severe load changes. The design and simulation of the concept is verified by experiment of 12 V input and 3.3 V/30 A output. Further improvement of transient response is obtained by replacing the output capacitor with a low impedance line component (LILC).\",\"PeriodicalId\":236199,\"journal\":{\"name\":\"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.\",\"volume\":\"81 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-06-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PESC.2003.1216612\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PESC.2003.1216612","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fast-response load regulation of DC-DC converter by means of reactance switching
The lower output voltage, higher output current and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further burden the problem, power saving "stop-clock" modes of the microprocessor has demanded faster and more stable transient response from the DC-DC converter. In this paper a new fast-response DC-DC converter design is presented that will meet the requirements and features of the new generation of microprocessors and digital systems. A novel method of reactance switching is applied to a DC-DC converter, and it provides the prominent features of current amplification and absorption. It produces a high slew rate of load current and keeps output voltage constant in case of severe load changes. The design and simulation of the concept is verified by experiment of 12 V input and 3.3 V/30 A output. Further improvement of transient response is obtained by replacing the output capacitor with a low impedance line component (LILC).
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