从晶体管到栅极的CMOS技术的自动逻辑提取器

25th ACM/IEEE, Design Automation Conference.Proceedings 1988. Pub Date : 1988-06-01 DOI:10.1109/DAC.1988.14809

M. Boehner

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引用次数: 42

摘要

提出了一种基于CMOS VLSI电路布局的从晶体管级描述中自动提取门级描述的程序。该提取算法将晶体管和门结合在一起，不需要任何单元库的帮助。由此产生的门级描述为数字逻辑模拟器的进一步研究提供了输入。

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LOGEX-an automatic logic extractor from transistor to gate level for CMOS technology

A program for automatic extraction of a gate-level description from a transistor-level description based on the layout of a CMOS VLSI circuit is presented. The extraction algorithm combines transistors to gates to arbitrary complexity without the help of any cell library. The resulting gate-level description provides the input for a digital logic simulator for further investigations.<>

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来源期刊

25th ACM/IEEE, Design Automation Conference.Proceedings 1988.

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