材料支持内存缩放和新架构

Zhijun Chen, Fred Fishburn, Chang Seok Kang, Sony Varghese, Bala Haran
{"title":"材料支持内存缩放和新架构","authors":"Zhijun Chen, Fred Fishburn, Chang Seok Kang, Sony Varghese, Bala Haran","doi":"10.1109/IMW56887.2023.10145976","DOIUrl":null,"url":null,"abstract":"Both DRAM and NAND evolution over the last decade have come less and less from cell design changes and more from material changes to address higher aspect ratios with reduced feature size variation. We review key processes that have enabled density shrink for both core memory array and the peri transistor. The current shortcomings in scaling DRAM are highlighted and we outline new architectures powered by novel materials and process that overcome these.","PeriodicalId":153429,"journal":{"name":"2023 IEEE International Memory Workshop (IMW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Materials Enabled Memory Scaling and New Architectures\",\"authors\":\"Zhijun Chen, Fred Fishburn, Chang Seok Kang, Sony Varghese, Bala Haran\",\"doi\":\"10.1109/IMW56887.2023.10145976\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Both DRAM and NAND evolution over the last decade have come less and less from cell design changes and more from material changes to address higher aspect ratios with reduced feature size variation. We review key processes that have enabled density shrink for both core memory array and the peri transistor. The current shortcomings in scaling DRAM are highlighted and we outline new architectures powered by novel materials and process that overcome these.\",\"PeriodicalId\":153429,\"journal\":{\"name\":\"2023 IEEE International Memory Workshop (IMW)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE International Memory Workshop (IMW)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMW56887.2023.10145976\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW56887.2023.10145976","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

在过去的十年中,DRAM和NAND的发展越来越少地来自于电池设计的变化,而更多地来自于材料的变化,以解决更高的长宽比和更小的特征尺寸变化。我们回顾了使核心存储器阵列和外围晶体管的密度缩小的关键工艺。强调了当前扩展DRAM的缺点,并概述了由新材料和工艺驱动的新架构,以克服这些缺点。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Materials Enabled Memory Scaling and New Architectures
Both DRAM and NAND evolution over the last decade have come less and less from cell design changes and more from material changes to address higher aspect ratios with reduced feature size variation. We review key processes that have enabled density shrink for both core memory array and the peri transistor. The current shortcomings in scaling DRAM are highlighted and we outline new architectures powered by novel materials and process that overcome these.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信