CGACLC: Improving genetic algorithm through clustering for designing of combinational logic circuits

Classical methods in combinational logic circuits design are not appropriate in practice for designing new circuits, which have different gates and high number of inputs. On the other hand, evolutionary designs are good alternatives for combinational logic circuit design, but have a common drawback namely, high randomness of their cross-over method. In order to overcome this drawback, a new genetic algorithm-based method for combinational logic circuit design is proposed in this paper, CGACLC. In the proposed method, the k-means algorithm is adopted to optimize the genetic algorithm for the purpose of increasing efficiency and reducing production cost. The optimization criteria of circuit elements like transistors gates count and power consumption are considered in CGACLC. The results obtained here indicate that CGACLC can better optimize the number of circuit elements at gate level and transistor count in comparison to previously proposed evolutionary algorithms.