一个VHSIC兼容CMOS/SOS电池系列

M. J. Fresnadillo Martínez, R. W. Polkinghorn
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引用次数: 0

摘要

仅给出摘要形式,如下。作者报告了一个家族的标准单元和宏/编译器设计成一个vhsic兼容,辐射硬CMOS/SOS(硅-蓝宝石)工艺。该系列目前由100个标准单元和5个宏/编译器组成。标准单元包括基本的门和触发器功能。宏/编译器可用于ram、rom、乘法器、寄存器文件和桶移位器。Daisy工作站上的前端设计库可用于这些功能,以允许原理图捕获,逻辑仿真,时序分析和网表生成。在阿波罗工作站上使用VLSI技术公司的软件完成自动放置和路由。编译功能采用VLSI技术编译软件。对雏菊的反向注释允许使用精确的路由电容进行重新模拟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A VHSIC compatible CMOS/SOS cell family
Summary form only given, as follows. The authors report on a family of standard cells and macro/compilers designed into a VHSIC-compatible, radiation-hard CMOS/SOS (silicon-on-sapphire) process. The family currently consists of one hundred standard cells and five macro/compilers. Standard cells include basic gate and flip-flop functions. The macro/compilers are available for RAMs, ROMs, multipliers, register files, and barrel shifters. A front-end design library is available for these functions on Daisy workstations to permit schematic capture, logic simulation, timing analysis, and netlist generation. Automatic placement and route is accomplished using VLSI Technology Inc. software on Apollo workstations. Compiled functions use VLSI technology compiler software. Back annotation to the Daisy permits resimulation using exact routing capacitances.<>
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