laus:一个节能的FPGA CNN加速器,支持定点训练框架

Zikai Nie, Zhisheng Li, Lei Wang, Shasha Guo, Yu Deng, Rangyu Deng, Q. Dou
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引用次数: 2

摘要

随着卷积神经网络(cnn)的发展,其高计算复杂度和能量消耗成为显著的问题。为了减少消耗,提出了许多CNN推理加速器。它们中的大多数基于32位浮点矩阵乘法,其中的数据精度是过度配置的。本文介绍了一种基于FPGA的8位定点LeNet推理引擎Laius。为了实现低精度的计算和存储,我们引入了我们的定点训练框架FixCaffe。为了节省FPGA资源,我们提出了一种方法来寻找LeNet中权重和偏置的最佳位长度。我们使用管道优化、平铺和理论分析来提高性能。实验结果表明,Laius的吞吐量达到44.9 Gops。此外,与相同结构的32位版本相比,8位Laius仅损失1%的精度,大大降低了31.43%的延迟、87.01%的LUT消耗、66.50%的BRAM消耗、65.11%的DSP消耗和47.95%的功耗。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Laius: an energy-efficient FPGA CNN accelerator with the support of a fixed-point training framework
With the development of convolutional neural networks (CNNs), their high computational complexity and energy consumption become significant problems. Many CNN inference accelerators are proposed to reduce the consumption. Most of them are based on 32-bit float-point matrix multiplication, where the data precision is over-provisioned. This paper presents Laius, an 8-bit fixed-point LeNet inference engine implemented on FPGA. To achieve low-precision computation and storage, we introduce our fixed-point training framework called FixCaffe. To economise FPGA resources, we proposed a methodology to find the optimal bit-length for weight and bias in LeNet. We use optimisations of pipelining, tiling, and theoretical analysis to improve the performance. Experiment results show that Laius achieves 44.9 Gops throughputs. Moreover, with only 1% accuracy loss, 8-bit Laius largely reduces 31.43% in delay, 87.01% in LUT consumption, 66.50% in BRAM consumption, 65.11% in DSP consumption and 47.95% in power compared to the 32-bit version with the same structure.
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