Optimising AIGaN/GaN HFET designs for high efficiency

This paper uses measured waveforms to demonstrate how to optimise GaN HFET PA designs in order to achieve high power and high efficiency. Efficiency values of 80% were achieved at a power density of 3 Wmm-4. The design procedure shows how waveform engineering, i.e. a combination of RF current and voltage waveform measurements, bias control and active harmonic load-pull, allow maximum performance to be achieved. The significant role of the device output capacitance in GaN designs that utilise large voltage swings is also explained, and a simple method for limiting the effect of Cds 5 is presented.