优化了同步数据流的软件合成

Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors Pub Date : 1997-07-14 DOI:10.1109/ASAP.1997.606831

S. Bhattacharyya, P. Murthy, Edward A. Lee

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引用次数: 18

摘要

本文回顾了一组用于将基于数据流的图形程序编译为可编程数字信号处理器上的有效实现的技术。这是一个关键问题，因为可编程数字信号处理器的片上存储器和速度能力非常有限，而且对于使用这些处理器的应用类型(通常是嵌入式系统)来说，使用片外存储器的财务成本通常非常高。本文描述的编译技术是为计算的同步数据流模型开发的，该模型已广泛用于DSP系统的指定和原型设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Optimized software synthesis for synchronous dataflow

This paper reviews a set of techniques for compiling dataflow-based, graphical programs for digital signal processing (DSP) applications into efficient implementations on programmable digital signal processors. This is a critical problem because programmable digital signal processors have very limited amounts of on-chip memory and the speed power, and financial cost penalties for using off-chip memory are often prohibitively high for the types of applications, typically embedded systems, in which these processors are used. The compilation techniques described in this paper are developed for the synchronous dataflow model of computation, a model that has found widespread use for specifying and prototyping DSP systems.

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Proceedings IEEE International Conference on Application-Specific Systems, Architectures and Processors

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