Preeti Goyal, Garima Srivastava, Jaya Madan, R. Pandey, R. Gupta
{"title":"源材料工程电荷等离子体为基础的双门TFET模拟/射频应用","authors":"Preeti Goyal, Garima Srivastava, Jaya Madan, R. Pandey, R. Gupta","doi":"10.1109/ICIERA53202.2021.9726718","DOIUrl":null,"url":null,"abstract":"In this work, a composite analysis of Si (silicon)-source CP (charge plasma) based DG (double gate) TFET, and Ge (germanium) source CP-DGTFET has been done. Here metals with definitive work function have been deposited at the top of the device to induce charge carriers in the source and drain region. The spacer at the source side is kept as 2 nm, and at the drain, it is kept as 5 nm. The linearity and analog performance parameters of both devices have been compared. TCAD simulations revealed that the Ge source CP-DGTFET has superior performance parameters such as ION, IOFFand $\\mathrm{g}_\\mathrm{m}$ as compared to the Si source CP-DGTFET. Further, to analyze the switching speed, parasitic capacitances have also been investigated.","PeriodicalId":220461,"journal":{"name":"2021 International Conference on Industrial Electronics Research and Applications (ICIERA)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Source Material-Engineered Charge Plasma based Double Gate TFET for Analog/RF Applications\",\"authors\":\"Preeti Goyal, Garima Srivastava, Jaya Madan, R. Pandey, R. Gupta\",\"doi\":\"10.1109/ICIERA53202.2021.9726718\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, a composite analysis of Si (silicon)-source CP (charge plasma) based DG (double gate) TFET, and Ge (germanium) source CP-DGTFET has been done. Here metals with definitive work function have been deposited at the top of the device to induce charge carriers in the source and drain region. The spacer at the source side is kept as 2 nm, and at the drain, it is kept as 5 nm. The linearity and analog performance parameters of both devices have been compared. TCAD simulations revealed that the Ge source CP-DGTFET has superior performance parameters such as ION, IOFFand $\\\\mathrm{g}_\\\\mathrm{m}$ as compared to the Si source CP-DGTFET. Further, to analyze the switching speed, parasitic capacitances have also been investigated.\",\"PeriodicalId\":220461,\"journal\":{\"name\":\"2021 International Conference on Industrial Electronics Research and Applications (ICIERA)\",\"volume\":\"59 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-12-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 International Conference on Industrial Electronics Research and Applications (ICIERA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIERA53202.2021.9726718\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Industrial Electronics Research and Applications (ICIERA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIERA53202.2021.9726718","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Source Material-Engineered Charge Plasma based Double Gate TFET for Analog/RF Applications
In this work, a composite analysis of Si (silicon)-source CP (charge plasma) based DG (double gate) TFET, and Ge (germanium) source CP-DGTFET has been done. Here metals with definitive work function have been deposited at the top of the device to induce charge carriers in the source and drain region. The spacer at the source side is kept as 2 nm, and at the drain, it is kept as 5 nm. The linearity and analog performance parameters of both devices have been compared. TCAD simulations revealed that the Ge source CP-DGTFET has superior performance parameters such as ION, IOFFand $\mathrm{g}_\mathrm{m}$ as compared to the Si source CP-DGTFET. Further, to analyze the switching speed, parasitic capacitances have also been investigated.