低温电子学中CMOS晶体管的三重CJFET (Si, SiN, GaN, GaAs)模拟及其主连接电路

N. Prokopenko, A. Zhuk, Y. Ivanov
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引用次数: 0

摘要

提出了用于JFET技术(Si、SiC、GaN、GaAs等)的CJFET复合晶体管(CT)的结构,其漏极-栅极特性类似于具有感应沟道的CMOS结场效应晶体管。所考虑的CJFET CT结构具有典型的关断状态区,栅源电压不超过其阈值电压。当等效栅极处电压升高时,CT切换到有源模式,可用于模拟信号放大任务。此外,相对于CT的等效漏极,所提出的CT中的信号不反转。这是它的奇妙之处。研究了低温电子学中CT的主连接硅电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Triple CJFET (Si, SiN, GaN, GaAs) Analog of the CMOS Transistor and its Main Connection Circuits in Low-Temperature Electronics
The structure of the CJFET composite transistor (CT) for JFET technologies (Si, SiC, GaN, GaAs, etc.) is proposed, which in its drain-gate characteristics is similar to a CMOS junction field-effect transistor with an induced channel. The structure of the CJFET CT under consideration has a typical off state zone with a gate-source voltage not exceeding its threshold voltage. When the voltage increases at the equivalent gate, the CT switches to the active mode and can be used in tasks of analog signal amplification. Besides, with respect to the equivalent drain terminal of the CT, the signal is not inverted in the proposed CT. This is its wonderful feature. The main connection silicon circuits of the CT in cryogenic electronics are considered.
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