{"title":"收缩期数组的形式推导-一个案例研究","authors":"M. Payer","doi":"10.1109/ARRAYS.1988.18073","DOIUrl":null,"url":null,"abstract":"The author exemplifies a conceptual framework, namely, the theory of finite-state machines, for the VLSI design process. He starts from a functional description of the system to be realized and achieves a (semi)systolic array in a formal way. The resulting designs are correct by their mere construction.<<ETX>>","PeriodicalId":339807,"journal":{"name":"[1988] Proceedings. International Conference on Systolic Arrays","volume":"84 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1988-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Formal derivation of systolic arrays-a case study\",\"authors\":\"M. Payer\",\"doi\":\"10.1109/ARRAYS.1988.18073\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The author exemplifies a conceptual framework, namely, the theory of finite-state machines, for the VLSI design process. He starts from a functional description of the system to be realized and achieves a (semi)systolic array in a formal way. The resulting designs are correct by their mere construction.<<ETX>>\",\"PeriodicalId\":339807,\"journal\":{\"name\":\"[1988] Proceedings. International Conference on Systolic Arrays\",\"volume\":\"84 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1988-05-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1988] Proceedings. International Conference on Systolic Arrays\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ARRAYS.1988.18073\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1988] Proceedings. International Conference on Systolic Arrays","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ARRAYS.1988.18073","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The author exemplifies a conceptual framework, namely, the theory of finite-state machines, for the VLSI design process. He starts from a functional description of the system to be realized and achieves a (semi)systolic array in a formal way. The resulting designs are correct by their mere construction.<>