基于优值图的低功耗连续时间/spl Sigma//spl Delta调制器设计策略

2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353) Pub Date : 2002-08-07 DOI:10.1109/ISCAS.2002.1010432

F. Gerfers, Kian Min Soh, M. Ortmanns, Y. Manoli

{"title":"基于优值图的低功耗连续时间/spl Sigma//spl Delta调制器设计策略","authors":"F. Gerfers, Kian Min Soh, M. Ortmanns, Y. Manoli","doi":"10.1109/ISCAS.2002.1010432","DOIUrl":null,"url":null,"abstract":"This paper presents a novel design strategy for low-power continuous-time (CT) /spl Sigma//spl Delta/ modulators. The figure of merit (FOM) is used to find the optimal /spl Sigma//spl Delta/ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3/sup rd/ order CT modulator.","PeriodicalId":203750,"journal":{"name":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Figure of merit based design strategy for low-power continuous-time /spl Sigma//spl Delta/ modulators\",\"authors\":\"F. Gerfers, Kian Min Soh, M. Ortmanns, Y. Manoli\",\"doi\":\"10.1109/ISCAS.2002.1010432\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a novel design strategy for low-power continuous-time (CT) /spl Sigma//spl Delta/ modulators. The figure of merit (FOM) is used to find the optimal /spl Sigma//spl Delta/ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3/sup rd/ order CT modulator.\",\"PeriodicalId\":203750,\"journal\":{\"name\":\"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISCAS.2002.1010432\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISCAS.2002.1010432","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 8

摘要

本文提出了一种新的低功率连续时间(CT) /spl σ //spl δ /调制器设计策略。优点图(FOM)用于寻找最佳的/spl Sigma//spl Delta/调制器实现，一方面考虑到最小的功耗，另一方面实现快速原型方法。该方法比较了不同调制器结构和调制器阶数在给定设计规范下的功率效率。1.5V 3/sup /阶CT调制器的测量结果表明了该策略的有效性。

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Figure of merit based design strategy for low-power continuous-time /spl Sigma//spl Delta/ modulators

This paper presents a novel design strategy for low-power continuous-time (CT) /spl Sigma//spl Delta/ modulators. The figure of merit (FOM) is used to find the optimal /spl Sigma//spl Delta/ modulator implementation with respect to a minimal power consumption on the one hand and to fulfil a rapid prototyping approach on the other hand. This method compares the power efficiency of different modulator structures and modulator orders with respect to the given design specifications. The efficiency of this strategy is shown by measurement results of a 1.5V 3/sup rd/ order CT modulator.

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2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353)

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