{"title":"第五代移动通信全集成CMOS宽带功率放大器","authors":"Bonghyuk Park, Hui-Dong Lee, Seunghyun Jang, Sunwoo Kong, Seunghun Wang, Jung-hwan Hwang","doi":"10.1109/ITC-CSCC58803.2023.10212682","DOIUrl":null,"url":null,"abstract":"This paper describes a power amplifier(PA) that performs frequency range 2(FR2) for fifth generation mobile networks (5G) using 65nm bulk CMOS devices. The power amplifier with two-stage cascode architecture achieved a small signal gain of 29.2 dB, the output 1-dB compression power (OP1dB) of 20.35 dBm, and the power added efficiency at peak power of 27.1% at 28 GHz under 2.2-V supply voltage. At 29GHz the small signal gain is 28.8 dB, the OP1dB is 20.29 dBm, and the power-added efficiency at peak power is 26.9% under 2.2-V supply voltage.","PeriodicalId":220939,"journal":{"name":"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fully Integrated CMOS Wideband Power Amplifier for Fifth Generation Mobile Communications\",\"authors\":\"Bonghyuk Park, Hui-Dong Lee, Seunghyun Jang, Sunwoo Kong, Seunghun Wang, Jung-hwan Hwang\",\"doi\":\"10.1109/ITC-CSCC58803.2023.10212682\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper describes a power amplifier(PA) that performs frequency range 2(FR2) for fifth generation mobile networks (5G) using 65nm bulk CMOS devices. The power amplifier with two-stage cascode architecture achieved a small signal gain of 29.2 dB, the output 1-dB compression power (OP1dB) of 20.35 dBm, and the power added efficiency at peak power of 27.1% at 28 GHz under 2.2-V supply voltage. At 29GHz the small signal gain is 28.8 dB, the OP1dB is 20.29 dBm, and the power-added efficiency at peak power is 26.9% under 2.2-V supply voltage.\",\"PeriodicalId\":220939,\"journal\":{\"name\":\"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)\",\"volume\":\"5 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ITC-CSCC58803.2023.10212682\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ITC-CSCC58803.2023.10212682","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Fully Integrated CMOS Wideband Power Amplifier for Fifth Generation Mobile Communications
This paper describes a power amplifier(PA) that performs frequency range 2(FR2) for fifth generation mobile networks (5G) using 65nm bulk CMOS devices. The power amplifier with two-stage cascode architecture achieved a small signal gain of 29.2 dB, the output 1-dB compression power (OP1dB) of 20.35 dBm, and the power added efficiency at peak power of 27.1% at 28 GHz under 2.2-V supply voltage. At 29GHz the small signal gain is 28.8 dB, the OP1dB is 20.29 dBm, and the power-added efficiency at peak power is 26.9% under 2.2-V supply voltage.