设计了一种基于多核DSP和FPGA的1553B总线测试单元

2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM) Pub Date : 2017-11-01 DOI:10.1109/ICAM.2017.8242169

Qingzhong Jia, Zongrui Liu

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引用次数: 1

摘要

本文介绍了一种基于多核DSP和FPGA的1553B总线测试单元的设计。用于实现1553B总线协议测试和电气性能测试。本文主要介绍了用于协议测试的1553B总线协议分析模块的设计，用于信号采集的高速ADC模块的设计，用于信号产生和故障注入的高速DAC的设计，用于阻抗测试的阻抗测试网络的设计，以及处理和控制模块的设计。实现1553B总线测试的测试单元方便、可靠性高、可扩展性好。

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The design of a kind of 1553B bus test unit based on multi-core DSP and FPGA

This paper describes the design of a kind of 1553B bus test unit based on multi-core DSP and FPGA. It is used to realize the 1553B bus protocol test and electrical performance test. This paper mainly describes the design of the 1553B bus protocol analysis module for protocol test, the design of the high-speed ADC module for signal acquisition, the design of the high-speed DAC for signal generation and fault injection, the design of the impedance test network for impedance test, and the design of the processing and control module. The test unit to realize 1553B bus test is convenient, highly reliable and of good scalability.

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2017 2nd IEEE International Conference on Integrated Circuits and Microsystems (ICICM)

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