{"title":"数字下变频的并行双步CORDIC算法","authors":"Hang Wang, Yousi Zheng, Xiaokang Lin","doi":"10.1109/CNSR.2009.47","DOIUrl":null,"url":null,"abstract":"The COordinate Rotation DIgital Computer (CORDIC) algorithm is a widely studied and hardware-efficient iterative algorithm for evaluating many arithmetic operations. In this paper, we propose a parallel double step CORDIC algorithm. All rotation directions can be predicted in parallel while two rotations are processed in each iteration. The novel hybrid algorithm achieves much less delay and similar throughput compared with parallel CORDIC algorithm [1]. Based on the new algorithm, we also provide a digital down converter architecture using dual CORDIC processor to eliminate both multiplier and CORDIC scale factor.","PeriodicalId":103090,"journal":{"name":"2009 Seventh Annual Communication Networks and Services Research Conference","volume":"115 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A Parallel Double-Step CORDIC Algorithm for Digital Down Converter\",\"authors\":\"Hang Wang, Yousi Zheng, Xiaokang Lin\",\"doi\":\"10.1109/CNSR.2009.47\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The COordinate Rotation DIgital Computer (CORDIC) algorithm is a widely studied and hardware-efficient iterative algorithm for evaluating many arithmetic operations. In this paper, we propose a parallel double step CORDIC algorithm. All rotation directions can be predicted in parallel while two rotations are processed in each iteration. The novel hybrid algorithm achieves much less delay and similar throughput compared with parallel CORDIC algorithm [1]. Based on the new algorithm, we also provide a digital down converter architecture using dual CORDIC processor to eliminate both multiplier and CORDIC scale factor.\",\"PeriodicalId\":103090,\"journal\":{\"name\":\"2009 Seventh Annual Communication Networks and Services Research Conference\",\"volume\":\"115 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-05-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 Seventh Annual Communication Networks and Services Research Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNSR.2009.47\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 Seventh Annual Communication Networks and Services Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNSR.2009.47","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Parallel Double-Step CORDIC Algorithm for Digital Down Converter
The COordinate Rotation DIgital Computer (CORDIC) algorithm is a widely studied and hardware-efficient iterative algorithm for evaluating many arithmetic operations. In this paper, we propose a parallel double step CORDIC algorithm. All rotation directions can be predicted in parallel while two rotations are processed in each iteration. The novel hybrid algorithm achieves much less delay and similar throughput compared with parallel CORDIC algorithm [1]. Based on the new algorithm, we also provide a digital down converter architecture using dual CORDIC processor to eliminate both multiplier and CORDIC scale factor.
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