Subthreshold behaviour modelling of FGMOS transistors using the ACM and the BSIM3V3 models

The modelling behaviour of FGMOS devices in the subthreshold region is investigated. Experimental and simulated ID-VGG, and gm/ID vs. log(ID) data for the standard CMOS 0.6 /spl mu/m process are compared. The BSIM3V3 and the advanced compact model, ACM are adopted to model the behaviour of the FGMOS transistors in the subthreshold region. Two different DC simulation macromodels are used for the DC simulation of the floating gate devices. The performance of the two MOSFET models and of the two DC simulation macromodels in modelling the FGMOS transistors in the subthreshold region is discussed.